The present invention relates generally to multilayer circuit boards and, more particularly, to an improved multilayer circuit board for improving signal performance by eliminating the need for electrically conductive vias.
The making of electrical connections between electronic components has long been accomplished using printed circuit boards. The first such circuit boards had only a single signal layer on the top surface thereof for routing electrical signals between electronic components mounted thereon. These single signal layer circuit boards have severe limitations with regard to the number of electrical signals that can be routed between electronic components mounted on the same circuit board. That is, the number of electrical signals that can be routed between electronic components mounted on a single signal layer circuit board is limited by the amount of area on the single signal layer. The area limitations associated with single signal layer circuit boards led to the development of multilayer printed circuit boards. Such multilayer printed circuit boards may be either single or double-sided and may have multiple signal layers on the surface of and buried within the multilayer printed circuit boards. Thus, such multilayer printed circuit boards have allowed a large increase in the number of electrical signals that may be routed between electronic components mounted on the same circuit board.
With the advent of multilayer printed circuit boards, however, new problems have arisen. For example, to make electrical connections between different layers in multilayer printed circuit boards, electrically conductive vias are generally used. While these electrically conductive vias allow direct vertical electrical connections to be made between different layers within a multilayer printed circuit board, there are intrinsic parasitics associated with these electrically conductive vias that can adversely affect the performance of signals propagating therethrough. That is, these electrically conductive vias have intrinsic parasitic resistance, capacitance, and inductance, which can adversely affect signals propagating along each electrically conductive via. Because of their adverse affect on signal performance, these intrinsic parasitics can also limit the bandwidth of signals propagating along each electrically conductive via.
To help illustrate the problems associated with electrically conductive vias, FIG. 1 shows a side cross-sectional view of a double-sided multilayer printed circuit board 10 having electrically conductive blind vias (microvias) 12 and electrically conductive buried vias 14 for making electrical connections between different layers in the multilayer printed circuit board 10, and between a first electronic component 16 and a second electronic component 18 mounted on opposite sides of the multilayer printed circuit board 10. The multilayer printed circuit board 10 comprises a primary (top) layer 20, a secondary (bottom) layer 22, and a plurality of intermediate layers 24. The top layer 20 and the bottom layer 22 are typically electrically conductive power/ground plane layers, but also have the separate electrically conductive microvias 12 formed therein for making electrical connections with the electronic components 16 and 18 mounted on the top layer 20 and the bottom layer 22 of the multilayer printed circuit board 10. The intermediate layers 24 alternate between non-electrically conductive dielectric layers and either electrically conductive signal layers or electrically conductive power/ground plane layers. For example, in FIG. 1, layers 26, 28, . . . 46 are non-electrically conductive dielectric layers, layers 48, 52, 56, 58, 62, and 66 are electrically conductive signal layers, and layers 50, 54, 60, and 64 (as well as layers 20 and 22) are electrically conductive power/ground plane layers.
As can be seen in FIG. 1, electrically conductive runs on signal layers 48, 56, and 66 are electrically connected to electrically conductive buried via 14a, and electrically conductive runs on signal layers 48, 62, and 66 are electrically connected to electrically conductive buried via 14b. FIG. 1 also shows a first electrically conductive run on signal layer 48 electrically connecting the electrically conductive microvia 12a to electrically conductive buried via 14a, a second electrically conductive run on signal layer 48 electrically connecting the electrically conductive microvia 12b to electrically conductive buried via 14b, a first electrically conductive run on signal layer 66 electrically connecting the electrically conductive microvia 12c to electrically conductive buried via 14a, and a second electrically conductive run on signal layer 66 electrically connecting the electrically conductive microvia 12d to electrically conductive buried via 14b. 
As previously mentioned, both the electrically conductive microvias 12 and the electrically conductive buried vias 14 shown in FIG. 1, as well as other kinds of electrically conductive vias (e.g., supervias, not shown, which are plated through holes connecting the top and bottom layers), have intrinsic parasitic resistance, capacitance, and inductance, which can adversely affect the performance of electrical signals propagating along each electrically conductive via, particularly signals propagating at high speed thereby adversely affecting signal bandwidth. These intrinsic parasitics are compounded by delicate interconnections between electrically conductive vias and electrically conductive signal layer runs, and by varying electroplating thicknesses in via barrels across the board, as well as by transmission line effects resulting from unnecessarily long signal path lengths due to awkward via placements and lengths. That is, anything other than a direct run on the same electrically conductive signal layer results in decreased electrical signal performance.
In view of the foregoing, it would be desirable to provide a technique for improving electrical signal performance in multilayer printed circuit boards by eliminating the need for electrically conductive vias.
According to the present invention, a technique for improving electrical signal performance in multilayer circuit boards by eliminating the need for electrically conductive vias is provided. In a preferred embodiment, the technique is realized as an improved multilayer circuit board having an electrically conductive signal layer disposed beneath at least one dielectric layer. The improvement comprises a cavity in the multilayer circuit board extending through the at least one dielectric layer so as to expose at least a portion of the electrically conductive signal layer within the cavity. The cavity is sized to accommodate an electronic component therein such that the electronic component makes electrical contact with the exposed portion of the electrically conductive signal layer, thereby eliminating the need for an electrically conductive via electrically connected to the electrically conductive signal layer and formed through the at least one dielectric layer or any other layer of the multilayer circuit board. The electronic component is typically either an integrated circuit component or a discrete component.
In accordance with other aspects of the present invention, at least the lateral dimensions of the cavity are beneficially sized to directly coincide with at least the lateral dimensions of the electronic component. This alleviates the need for any specialized positioning equipment, which has heretofore typically been required when mounting electronic components on circuit boards.
In accordance with further aspects of the present invention, the cavity is beneficially formed as a channel through which air may be forced for cooling at least the electronic component.
In accordance with still further aspects of the present invention, wherein the electrically conductive signal layer is a first electrically conductive layer, wherein the multilayer circuit board has a second electrically conductive layer disposed above the at least one dielectric layer, and wherein the cavity also extends through the second electrically conductive layer, the improvement further beneficially comprises an electrically conductive shield electrically connected to the second electrically conductive layer for shielding electromagnetic interference to and from the electronic component. The second electrically conductive layer is typically an electrically conductive power/ground plane layer, although the second electrically conductive layer may also be an additional electrically conductive signal layer. Also, wherein the multilayer circuit board has at least one second dielectric layer disposed above the second electrically conductive layer, the improvement further beneficially comprises a second cavity in the multilayer circuit board extending through the at least one second dielectric layer so as to expose at least a portion of the second electrically conductive layer within the second cavity where the electrically conductive shield is electrically connected to the second electrically conductive layer. The second cavity is typically sized so as to be larger in lateral dimension than the first cavity.
In accordance with still further aspects of the present invention, wherein the multilayer circuit board is a double-sided multilayer circuit board, wherein the cavity is a first cavity on a first side of the multilayer circuit board, wherein the electrically conductive signal layer is a first electrically conductive signal layer, wherein the at least one dielectric layer is at least one first dielectric layer, wherein the electronic component is a first electronic component, and wherein the multilayer circuit board has a second electrically conductive signal layer disposed beneath at least one second dielectric layer relative to a second side of the multilayer circuit board, the improvement further beneficially comprises a second cavity on the second side of the multilayer circuit board extending through the at least one second dielectric layer so as to expose at least a portion of the second electrically conductive signal layer within the second cavity. Similar to above, the second cavity is sized to accommodate a second electronic component therein such that the second electronic component makes electrical contact with the exposed portion of the second electrically conductive signal layer, thereby eliminating the need for an electrically conductive via electrically connected to the second electrically conductive signal layer and formed through the at least one second dielectric layer or any other layer of the multilayer circuit board. Significantly, the second cavity can be located substantially opposite the first cavity in the multilayer circuit board.
In an alternative embodiment, the technique is realized as a method for improving electrical signal performance in multilayer circuit boards by eliminating the need for electrically conducting vias. The method assumes a multilayer circuit board has an electrically conductive signal layer disposed beneath at least one dielectric layer. The method comprises forming a cavity in the multilayer circuit board extending through the at least one dielectric layer so as to expose at least a portion of the electrically conductive signal layer within the cavity. The cavity is sized to accommodate an electronic component therein such that the electronic component makes electrical contact with the exposed portion of the electrically conductive signal layer, thereby eliminating the need for an electrically conductive via electrically connected to the electrically conductive signal layer and formed through the at least one dielectric layer or any other layer of the multilayer circuit board.
In accordance with other aspects of the present invention, the cavity may be formed by etching the cavity in the multilayer circuit board. For example, the cavity may be formed by photolithographically etching the cavity in the multilayer circuit board, or plasma etching the cavity in the multilayer circuit board. Alternatively, the cavity may be formed by milling the cavity in the multilayer circuit board. For example, the cavity may be formed by laser ablating the cavity in the multilayer circuit board. Alternatively still, the cavity may be formed by prefabricating the at least one dielectric layer such that the cavity is formed upon assembly of the electrically conductive signal layer and the at least one dielectric layer into the multilayer circuit board.
In accordance with further aspects of the present invention, wherein the electrically conductive signal layer is a first electrically conductive layer, wherein the multilayer circuit board has a second electrically conductive layer disposed above the at least one dielectric layer, and wherein the cavity also extends through the second electrically conductive layer, the method further beneficially comprises electrically connecting an electrically conductive shield to the second electrically conductive layer for shielding electromagnetic interference to and from the electronic component. If the multilayer circuit board has at least one second dielectric layer disposed above the second electrically conductive layer, the method may further beneficially comprise forming a second cavity in the multilayer circuit board extending through the at least one second dielectric layer so as to expose at least a portion of the second electrically conductive layer within the second cavity where the electrically conductive shield is electrically connected to the second electrically conductive layer.
In accordance with still further aspects of the present invention, wherein the multilayer circuit board is a double-sided multilayer circuit board, wherein the cavity is a first cavity on a first side of the multilayer circuit board, wherein the electrically conductive signal layer is a first electrically conductive signal layer, wherein the at least one dielectric layer is at least one first dielectric layer, wherein the electronic component is a first electronic component, and wherein the multilayer circuit board has a second electrically conductive signal layer disposed beneath at least one second dielectric layer relative to a second side of the multilayer circuit board, the method further beneficially comprises forming a second cavity on the second side of the multilayer circuit board extending through the at least one second dielectric layer so as to expose at least a portion of the second electrically conductive signal layer within the second cavity. Similar to above, the second cavity is sized to accommodate a second electronic component therein such that the second electronic component makes electrical contact with the exposed portion of the second electrically conductive signal layer, thereby eliminating the need for an electrically conductive via electrically connected to the second electrically conductive signal layer and formed through the at least one second dielectric layer or any other layer of the multilayer circuit board.
The present invention will now be described in more detail with reference to exemplary embodiments thereof as shown in the appended drawings. While the present invention is described below with reference to preferred embodiments, it should be understood that the present invention is not limited thereto. Those of ordinary skill in the art having access to the teachings herein will recognize additional implementations, modifications, and embodiments, as well as other fields of use, which are within the scope of the present invention as disclosed and claimed herein, and with respect to which the present invention could be of significant utility.